A low-power Cu atom switch programmable logic fabricated in a 40nm-node CMOS technology

X. Bai, T. Sakamoto, M. Tada, M. Miyamura, Y. Tsuji, A. Morioka, R. Nebashi, N. Banno, K. Okamoto, N. Iguchi, H. Hada, T. Sugibayashi
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引用次数: 8

Abstract

For the first time, a 40nm-node, 2x logic density, 3.8x operation speed, and 3x power efficient, nonvolatile programmable logic (NPL) is demonstrated by using Cu atom switch for configuration switches. The switching characteristics of the atom switch are kept in scaling down to 64/32nm device area, and an improved PSE reduces set voltage while keeping low leakage current, enabling core transistors to select the atom switches. The developed 40nm NPL is a strong candidate for the next wave of energy-efficient computing.
采用40nm节点CMOS技术制备的低功耗Cu原子开关可编程逻辑
首次使用Cu原子开关作为配置开关,展示了40nm节点、2倍逻辑密度、3.8倍运算速度和3倍功率效率的非易失性可编程逻辑(NPL)。原子开关的开关特性保持在缩小到64/32nm器件面积,改进的PSE在保持低漏电流的同时降低了设定电压,使核心晶体管能够选择原子开关。开发的40nm NPL是下一波节能计算的有力候选者。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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