J. Nebhen, S. Meillére, M. Masmoudi, J. Seguin, H. Barthélemy, K. Aguir
{"title":"A 250 μW 0.194 nV/rtHz Chopper-Stabilized instrumentation amplifier for MEMS gas sensor","authors":"J. Nebhen, S. Meillére, M. Masmoudi, J. Seguin, H. Barthélemy, K. Aguir","doi":"10.1109/DTIS.2012.6232977","DOIUrl":null,"url":null,"abstract":"In this paper, a low-noise, low-power and low voltage Chopper Stabilized CMOS Amplifier (CHS-A) is presented and simulated using transistor model parameters of the AMS 0.35 μm CMOS process. Chopping is used to modulate the offset away from the output signal where it can be easily filtered out, providing continuous offset reduction which is insensitive to drift. The CHS was simulated using typical transistor model parameters BSIM 3V3 of the 0.35 μm CMOS process technology from AMS [1]. Under at ±1.25 V power supply and a voltage gain of 49dB, the total power consumption is 250 μW only. At the same simulation condition, it achieves a noise floor of 0.194 nV/√Hz within the frequency range from 1 kHz to 10 kHz and the inband PSRR is above 90, the CMRR exceeds 120 dB. The circuit occupies an effective small chip area of 3.233 mm2.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2012.6232977","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this paper, a low-noise, low-power and low voltage Chopper Stabilized CMOS Amplifier (CHS-A) is presented and simulated using transistor model parameters of the AMS 0.35 μm CMOS process. Chopping is used to modulate the offset away from the output signal where it can be easily filtered out, providing continuous offset reduction which is insensitive to drift. The CHS was simulated using typical transistor model parameters BSIM 3V3 of the 0.35 μm CMOS process technology from AMS [1]. Under at ±1.25 V power supply and a voltage gain of 49dB, the total power consumption is 250 μW only. At the same simulation condition, it achieves a noise floor of 0.194 nV/√Hz within the frequency range from 1 kHz to 10 kHz and the inband PSRR is above 90, the CMRR exceeds 120 dB. The circuit occupies an effective small chip area of 3.233 mm2.