Analysis of a PLL based frequency synthesizer using switched loop bandwidth for Mobile WiMAX

Abstract

This paper is focused on design aspects of a fractional-N PLL (phase locked loop) based frequency synthesizer proposed for the mobile WiMAX (worldwide interoperability for mobile access) standard. Requirements in terms of phase noise, settling time, frequency resolution and frequency of operation for WiMAX frequency synthesizer are presented. Furthermore, a high-speed CP (Charge Pump) PLL based synthesizer with a switched loop bandwidth is proposed and simulated. It has a 32 MHz reference frequency and a 50 kHz loop bandwidth with frequency raster of 125 kHz and 14 mus settling time.