Enhanced Ripple Blocker

Abstract

The present paper introduces a Ripple blocker architecture having a high power supply rejection ratio, as the main feature. The specific performance circuit parameters, the block circuit, the main sub-circuits of the designed Ripple blocker together with the transistor level circuits are presented. The Ripple blocker is provided with a current sense circuit that ensures the capability to maintain the desired behavior with a wide range of load resistor values.