A novel CBRAM integration using subtractive dry-etching process of Cu enabling high-performance memory scaling down to 10nm node

A. Redolfi, L. Goux, N. Jossart, F. Yamashita, E. Nishimura, D. Urayama, K. Fujimoto, T. Witters, F. Lazzarino, M. Jurczak
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引用次数: 8

Abstract

We introduce for the first time a novel integration scheme of CBRAM cells, where the Cu electrode is patterned using a subtractive dry-etching process. We demonstrate excellent performances of 30nm-size cells (1μs-write at ≤50μA, >106 endurance, excellent retention at 150°C) as well as scaling potential of CBRAM down to 10nm-node using 5nm-thick Cu electrodes.
一种新型的CBRAM集成,采用Cu的减干蚀刻工艺,使高性能存储器缩小到10nm节点
我们首次介绍了一种新的CBRAM电池集成方案,其中Cu电极使用减法干蚀刻工艺进行图像化。我们证明了30nm尺寸电池的优异性能(≤50μA时1μs-write, >106续航时间,150°C时优异的保留率),以及使用5nm厚的Cu电极将CBRAM缩放到10nm节点的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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