{"title":"Efficient simulation of multiconductor transmission lines using order-reduction techniques","authors":"L. Y. Li, G. Bridges, I. Ciric","doi":"10.1109/ANTEM.2000.7851691","DOIUrl":null,"url":null,"abstract":"With the finer feature sizes and faster clock frequencies of microelectronic circuits, the design and analysis of interconnects is becoming increasingly important. High speed circuits require an accurate prediction of transmission-line effects such as ringing, reflection, distortion, and crosstalk. Typically, interconnections on integrated circuits, printed circuit boards, and multichip modules are modeled with large linear networks, which may consist of hundreds and thousands of lumped and distributed components. Consequently, the use of conventional simulation tools such as SPICE for interconnect analysis would be inefficient or even prohibitive from the point of view of the computational cost","PeriodicalId":416991,"journal":{"name":"Symposium on Antenna Technology and Applied Electromagnetics [ANTEM 2000]","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium on Antenna Technology and Applied Electromagnetics [ANTEM 2000]","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ANTEM.2000.7851691","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
With the finer feature sizes and faster clock frequencies of microelectronic circuits, the design and analysis of interconnects is becoming increasingly important. High speed circuits require an accurate prediction of transmission-line effects such as ringing, reflection, distortion, and crosstalk. Typically, interconnections on integrated circuits, printed circuit boards, and multichip modules are modeled with large linear networks, which may consist of hundreds and thousands of lumped and distributed components. Consequently, the use of conventional simulation tools such as SPICE for interconnect analysis would be inefficient or even prohibitive from the point of view of the computational cost