Modeling and design of a Folded Cascode bulk driven OTA

Abstract

Analog circuit design is often based on a large number of simulations which strongly depends on the mastery of CAD tools and competence of the designer. In this context, the automated design of analog architectures becomes a necessity of design to solve the problem of simulation time. More importantly, accelerating the design cycle of the analog block, taking into account many constraints and finally formalizing the experience of analogiciens designers. In this paper we present a method for modeling the performance parameters of analog architectures, this is for the optimization of optimal sizing of transistors constituting the circuit to achieve the desired characteristics. This work is done following a modeling of the functioning of the Operational Amplifier using mathematical formulation software “Maxima”. The formulation is based on the SPICE level 1 model of the MOS transistor. Finally, the elaboration of the model is developed under MATLAB. The proposed method is presented and applied to the modeling and design of a Folded Cascode bulk driven OTA using a 0.35μm CMOS technology. Simulations with Cadence Spectrum are presented and compared with manual calculations and also to numerical calculations that have shown the effectiveness of the proposed methodology. Then, we determine the optimal parameters of the operational amplifier, which accord, maximum, to the desired specifications.