S. Alam, D. Houssameddine, F. Neumeyer, I. Rahman, M. Deherrera, S. Ikegawa, P. Sanchez, X. Zhang, Y. Wang, J. Williams, D. Gogl, H. Xu, M. Farook, D. Aceves, H. K. Lee, F. Mancoff, M. Chou, C. Tan, B. Huang, S. Mukherjee, M. Lu, A. Shah, K. Nagel, Y. Kim, S. Aggarwal
{"title":"Persistent xSPI STT-MRAM with up to 400MB/s Read and Write Throughput","authors":"S. Alam, D. Houssameddine, F. Neumeyer, I. Rahman, M. Deherrera, S. Ikegawa, P. Sanchez, X. Zhang, Y. Wang, J. Williams, D. Gogl, H. Xu, M. Farook, D. Aceves, H. K. Lee, F. Mancoff, M. Chou, C. Tan, B. Huang, S. Mukherjee, M. Lu, A. Shah, K. Nagel, Y. Kim, S. Aggarwal","doi":"10.1109/IMW52921.2022.9779276","DOIUrl":null,"url":null,"abstract":"We present the new generation of Everspin's STT-MRAM device with extended Serial Peripheral Interface (xSPI). The device is capable of persistent memory operation with random reads and writes while supporting page-buffered program and optional erase for compatibility with Serial NOR Flash protocol. MRAM technology has been optimized for the needed improvements to enable low-latency industrial applications. Two bank architecture with a new write scheme is employed for fast write providing up to 4 orders of magnitude write energy improvement over traditional NOR. We demonstrate full 64Mb die high-speed functionality with symmetric read and write throughput of up to 400MB/s.","PeriodicalId":132074,"journal":{"name":"2022 IEEE International Memory Workshop (IMW)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW52921.2022.9779276","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We present the new generation of Everspin's STT-MRAM device with extended Serial Peripheral Interface (xSPI). The device is capable of persistent memory operation with random reads and writes while supporting page-buffered program and optional erase for compatibility with Serial NOR Flash protocol. MRAM technology has been optimized for the needed improvements to enable low-latency industrial applications. Two bank architecture with a new write scheme is employed for fast write providing up to 4 orders of magnitude write energy improvement over traditional NOR. We demonstrate full 64Mb die high-speed functionality with symmetric read and write throughput of up to 400MB/s.