Catastrophic defects oriented testability analysis of a class AB amplifier

Abstract

Process defects have been recognized as one of the major contributors to the yield loss in CMOS integrated circuits. Any test philosophy without taking into consideration the probable processing defects is likely to compromise the quality of the tested devices. Owing to the specification oriented testing, analog devices frequently suffer from quality and reliability related issues. However, defect oriented testability analysis can be utilized to improve the quality of test methods and reduce the test costs. Furthermore, this analysis can provide inputs to the designer to improve the design robustness against the likely process defects. This methodology has been demonstrated with an example of a class AB amplifier.