Seongwook Park, Gyeonghoon Kim, Junyoung Park, H. Yoo
{"title":"A 1.5nJ/pixel super-resolution enhanced FAST corner detection processor for high accuracy AR","authors":"Seongwook Park, Gyeonghoon Kim, Junyoung Park, H. Yoo","doi":"10.1109/ESSCIRC.2014.6942054","DOIUrl":null,"url":null,"abstract":"Most vision applications such as object recognition and augmented reality require a high resolution image because their performance is heavily dependent on a local feature point like an edge and a corner. Unfortunately, the vulnerability of correct feature detection always exists in vision applications. Moreover, it is hard to increase image resolution because there is the trade-off between the image resolution and the system power consumption in a wearable device. To resolve this, we present an energy-efficient Features from Accelerated Segment Test (FAST) corner detection processor with a high-throughput super-resolution 4-core cluster for low-power and high accuracy AR applications. To perform high throughput super-resolution, the hardware is proposed with an adaptive multi-issue multiply-accumulate (AMMAC) unit and a shift register (SHR) based angle integrator. Finally, a proposed super-resolution enhanced FAST corner detection processor performs 13.51% detection accuracy enhanced FAST corner detection on up to a 16× super-resolution image with only 1.5nJ/pixel energy efficiency.","PeriodicalId":202377,"journal":{"name":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2014.6942054","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Most vision applications such as object recognition and augmented reality require a high resolution image because their performance is heavily dependent on a local feature point like an edge and a corner. Unfortunately, the vulnerability of correct feature detection always exists in vision applications. Moreover, it is hard to increase image resolution because there is the trade-off between the image resolution and the system power consumption in a wearable device. To resolve this, we present an energy-efficient Features from Accelerated Segment Test (FAST) corner detection processor with a high-throughput super-resolution 4-core cluster for low-power and high accuracy AR applications. To perform high throughput super-resolution, the hardware is proposed with an adaptive multi-issue multiply-accumulate (AMMAC) unit and a shift register (SHR) based angle integrator. Finally, a proposed super-resolution enhanced FAST corner detection processor performs 13.51% detection accuracy enhanced FAST corner detection on up to a 16× super-resolution image with only 1.5nJ/pixel energy efficiency.