Modulo 2n+1 addition and multiplication for redundant operands

Abstract

Complex arithmetic operations are widely used in Digital Signal Processing (DSP) applications. Keeping the intermediate results in a redundant representation (e.g. carry-save) is a common technique to speed up chained arithmetic operations due to the elimination of the intermediate parallel additions which occupy significant area and largely increase the overall critical delay. Thus, arithmetic units with operands in a redundant representation are of considerable practical interest. In this work, we propose an efficient modulo 2n+1 addition unit with one or both operands in the redundant carry-save representation and, also, we introduce an efficient modulo 2n+1 multiplier with the one of two operands in the redundant carry-save form.