The optimal choice of high pin count ASIC packages

Fourth IEEE/CHMT European International Electronic Manufacturing Technology Symposium Pub Date : 1988-06-13 DOI:10.1109/EEMTS.1988.75947

K. Gustafsson, U. Andersson, S. Ek, L. Liljestrand

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引用次数: 3

Abstract

Six different types of application-specific integrated circuit (ASIC) packages are compared with respect to production aspects, availability, reliability, thermal and electrical properties, and cost. Recommendations for the proper choice of packages for different types of applications are given. Pin-grid-array packages are found to be expensive and the through hole mounting reduces the routing capability of the board. Pad-area-array packages are a hermetic alternative with a lower price for the package as well as very good thermal and electrical properties, but they need to be mounted on expensive printed-wiring board (PWB). Another surface-mountable package which is hermetic is the ceramic leaded chip carrier with fine lead pitch. This package is even more expensive than the pin-grid array package and it is difficult to handle. It is suggested that in the future, nonhermetic alternatives will probably be dominant. Plastic quad flat pack and TapePak can be used when less than 160-170 leads are necessary, while direct assembled tape automated bonding (TAB) is believed to be the best alternative for very high pin counts.<>

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高引脚数ASIC封装的最佳选择

六种不同类型的专用集成电路(ASIC)封装在生产方面、可用性、可靠性、热学和电学性能以及成本方面进行了比较。针对不同类型的应用程序，给出了正确选择软件包的建议。pin -grid阵列封装价格昂贵，通孔安装降低了电路板的布线能力。垫面阵列封装是一种密封的替代方案，具有较低的封装价格以及非常好的热学和电学性能，但它们需要安装在昂贵的印刷布线板(PWB)上。另一种表面贴装封装是密封的陶瓷引线芯片载体，引线间距很细。这种封装比针栅阵列封装更昂贵，而且难以处理。有人建议，在未来，非密封的替代品可能会占主导地位。塑料四平包和TapePak可用于少于160-170引线是必要的，而直接组装胶带自动键合(TAB)被认为是非常高的引脚数的最佳选择。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Fourth IEEE/CHMT European International Electronic Manufacturing Technology Symposium

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