T. Kikkawa, T. Hosoda, S. Akiyama, Y. Kotani, Toshihiro Wakabayashi, Tsutomu Ogino, K. Imanishi, Akitoshi Mochizuki, K. Itabashi, K. Shono, Y. Asai, K. Joshin, T. Ohki, M. Kanamura, M. Nishimori, T. Imada, J. Kotani, A. Yamada, N. Nakamura, T. Hirose, Keiji Watanabe
{"title":"600 V GaN HEMT on 6-inch Si substrate using Au-free Si-LSI process for power applications","authors":"T. Kikkawa, T. Hosoda, S. Akiyama, Y. Kotani, Toshihiro Wakabayashi, Tsutomu Ogino, K. Imanishi, Akitoshi Mochizuki, K. Itabashi, K. Shono, Y. Asai, K. Joshin, T. Ohki, M. Kanamura, M. Nishimori, T. Imada, J. Kotani, A. Yamada, N. Nakamura, T. Hirose, Keiji Watanabe","doi":"10.1109/WIPDA.2013.6695552","DOIUrl":null,"url":null,"abstract":"In this paper, we describe 600 V GaN high electron mobility transistors (HEMTs) technologies on a 6-inch Si substrate using an Au-free Si-LSI mass production line. Metal insulator semiconductor (MIS) HEMTs were fabricated using AlN as a gate insulator. The AlN layer was deposited by thermal atomic layer deposition (ALD) method using the mass-production-type vertical reactor which was capable for over 100 wafer depositions per run. High-temperature breakdown voltage of over 600 V was confirmed. Uniform static on-resistance (RON) across a 6-inch wafer was demonstrated using the AlN based gate insulator. Stable dynamic RON characteristics till 600 V were also verified using packaged GaN HEMT devices, suggesting that GaN on Si technology in this study is ready for manufacturing. Power factor control (PFC) circuit board operation was also demonstrated at high frequency up to 1 MHz.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2013.6695552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper, we describe 600 V GaN high electron mobility transistors (HEMTs) technologies on a 6-inch Si substrate using an Au-free Si-LSI mass production line. Metal insulator semiconductor (MIS) HEMTs were fabricated using AlN as a gate insulator. The AlN layer was deposited by thermal atomic layer deposition (ALD) method using the mass-production-type vertical reactor which was capable for over 100 wafer depositions per run. High-temperature breakdown voltage of over 600 V was confirmed. Uniform static on-resistance (RON) across a 6-inch wafer was demonstrated using the AlN based gate insulator. Stable dynamic RON characteristics till 600 V were also verified using packaged GaN HEMT devices, suggesting that GaN on Si technology in this study is ready for manufacturing. Power factor control (PFC) circuit board operation was also demonstrated at high frequency up to 1 MHz.
在本文中,我们描述了600 V GaN高电子迁移率晶体管(hemt)技术在6英寸Si衬底上使用无金Si- lsi量产线。采用AlN作为栅极绝缘体制备了金属绝缘体半导体hemt。采用热原子层沉积法(ALD)沉积AlN层,采用可批量生产的立式反应器,每运行可沉积100片以上。高温击穿电压超过600 V。使用AlN基栅绝缘体演示了6英寸晶圆上均匀的静态导通电阻(RON)。使用封装的GaN HEMT器件也验证了600 V前的稳定动态RON特性,这表明本研究中的GaN on Si技术已经准备好用于制造。功率因数控制(PFC)电路板操作也演示了在高达1兆赫的高频。