A sixth-order CMOS sigma-delta modulator

Abstract

A sixth-order sigma-delta modulator is presented. Sixth-order noise shaping is achieved though four stage cascaded noise cancellation network. Behavioral simulation shows that cascaded 2-1-1-2, (second order-first order-first order-second order) is very robust and suitable for VLSI implementation. An experimental prototype was fabricated using 2 /spl mu/m CMOS process by MOSIS. Measurement result shows that the modulator achieved 89 dB (14.8 bit) peak SNR and 92 dB (15.3 bit) dynamic range for 32 kHz bandwidth at a sampling rate of 1.024 MHz which corresponds to an oversampling ratio of 16. The modulator dissipates 79 mW at +/- 3.3 V supply voltage.