A low power analog RAM implementation for in-probe beamforming in ultrasound imaging

Abstract

An Analog RAM architecture for beamforming based on switched current circuits is presented. The proposed architecture allows the sharing of the same bias current for different memory cells, hence results in a large amount of power saving. The beamformer consists of total 16 channels and in each channel a delay line with depth of 16 has been implemented. The input frequency is 10MHz and a sampling frequency of 25MHz is used. The proposed architecture achieves 50dB of dynamic range and 49dB of SNDR with power dissipation of 760μW for one channel. The ARAM is implemented in 180nm CMOS technology and occupies 250×150μm2 per channel.