Automated design space exploration of FPGA-based FFT architectures based on area and power estimation

M. A. S. Marcos, M. Garrido, M. López-Vallejo, C. López-Barrio
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引用次数: 8

Abstract

In this paper a tool aimed at generating fast Fourier transform (FFT) cores targeting FPGA platforms was presented. The tool is able to generate different pipelined architectures of the FFT that provide different points of the design space: from high performance to low area implementations. The user can select the most suitable architecture based on a broad set of configuration parameters, as they are the number of points, sample size, truncation, etc. Moreover, a set of accurate estimators has been implemented to allow the designer an early and quick design space exploration before synthesizing the core. Experimental results validate our approach and provide significant measurements about the accuracy of the estimation and the tool execution time
基于面积和功率估计的基于fpga的FFT架构的自动设计空间探索
本文提出了一种针对FPGA平台的快速傅立叶变换(FFT)内核生成工具。该工具能够生成不同的FFT流水线架构,提供不同的设计空间点:从高性能到低面积实现。用户可以根据一组广泛的配置参数选择最合适的体系结构,因为它们是点的数量、样本大小、截断等。此外,还实现了一套精确的估计器,使设计师能够在合成核心之前进行早期和快速的设计空间探索。实验结果验证了我们的方法,并提供了关于估计精度和工具执行时间的重要测量
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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