High Density Interconnect (HDI) Socket Flow & Waprage Prediction & Characterization

R. Ooi, F. Costa, Sam Hsieh, E. Chiu, Wendy Xu, Dave Yu, Darwin Fan, Allen Cheng, Andrew Gattuso, Yongfu Wang, Currey Hsieh, Jeffery Toran, J. Thompson, Pierre-Louis Toussaint, Ryan Curry, L. W. Keat, R. Kulterman, H. Fu
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Abstract

High density interconnect (HDI) sockets for CPU, GPU etc. is trending to larger form factor as the interconnect counts approach the realm of 10,000. One of the key bottleneck in HDI socket development is the ability of flow and warpage simulation techniques to reduce the design cycle time. The focus of this project is to explore novel simulation techniques to speed up the flow prediction part of simulation and reduce physical experiments needed to improve time to market (TTM) cycle of HDI sockets. The main challenge in HDI socket simulation is: (1) complexity of fibre-filled liquid crystal polymer (LCP) material properties and (2) complex but repetitive pin holes in the core pin region of the HDI socket. This takes up ~90% of the simulation time and slows down the design cycle. In this project, focus was put in to simplify the repetitive pin hole structure. The pin hole arrays are represented by equivalent flow resistant model and produce similar flow patterns in shorter time. In order to achieve this, three (3) LCP materials grades with known properties were provided by project partner Celanese. Test vehicle (TV) of HDI sockets were then build by socket fabrication partners using the LCP material provided. Room temp (RT) warpage of the socket were measured, together with short-shot samples collected for simulation flow and warpage prediction validation. The repetitive pin hole arrays of the HDI sockets are represented by equivalent flow resistant model. The predicted flow patterns from simulation are in good agreement with short-shot samples. The warpage shape and magnitude predictions are also in good agreement for 2 out of 3 material grades. It was later found out that the odd material that has different warpage has a different matrix (resin) LCP property. Solving time improvement ranging between 3.6x and 35x times were demonstrated in the proof of concept. The project outcome allows faster flow and warpage simulation for HDI socket design and development. The utilization of numerical predictions will be greatly increased, reduced material cost used for design prototyping and injection mold chase tape outs. Simulation software partners from the project will develop further on the demo beta versions for eventual product releases.
高密度互连(HDI)套接字流量和波动预测与表征
CPU、GPU等的高密度互连(HDI)插座随着互连数量接近10000个,正趋向于更大的尺寸。HDI套接字开发的关键瓶颈之一是流动和翘曲模拟技术的能力,以减少设计周期时间。该项目的重点是探索新的模拟技术,以加快模拟的流量预测部分,减少物理实验,以提高HDI插座的上市时间(TTM)周期。HDI插座仿真面临的主要挑战是:(1)纤维填充液晶聚合物(LCP)材料特性的复杂性;(2)HDI插座核心引脚区域的引脚孔复杂且重复。这占用了约90%的仿真时间,并减慢了设计周期。在这个项目中,重点是简化重复的销孔结构。用等效流阻模型表示针孔阵列,在较短时间内产生相似的流态。为了实现这一目标,项目合作伙伴塞拉尼斯提供了三种已知性能的LCP材料等级。然后由插座制造合作伙伴使用提供的LCP材料建造HDI插座的测试车辆(TV)。测量了插座的室温(RT)翘曲,并收集了短片样品用于模拟流动和翘曲预测验证。HDI插座的重复引脚孔阵列用等效流阻模型表示。模拟预测的流型与短样本吻合较好。翘曲形状和大小的预测也很好地符合2 / 3的材料等级。后来发现,具有不同翘曲量的奇数材料具有不同的基体(树脂)LCP特性。在概念验证中证明了解决时间的改善范围在3.6倍到35倍之间。项目结果允许更快的流动和翘曲模拟HDI插座设计和开发。数值预测的利用率将大大提高,降低材料成本,用于设计原型和注塑模具追逐胶带。该项目的模拟软件合作伙伴将进一步开发最终产品版本的演示测试版本。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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