F. Ponchel, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht
{"title":"On the analysis of four symmetrical interconnects for signal integrity evaluation","authors":"F. Ponchel, J. Legier, E. Paleczny, C. Seguinot, D. Deschacht","doi":"10.1109/SPI.2005.1500928","DOIUrl":null,"url":null,"abstract":"The purpose of this paper is to explain the way used to determine the electrical frequency dependant equivalent circuit of four coupled interconnects located on the same level. This is done with a full wave finite element method in one way, and the analysis of four symmetrical lines with the telegrapher transmission line equation and coupled mode theory in another way. Once the equivalent R/sub i/, L/sub i/, G/sub i/, Q/sub i/, Z/sub ij/,Y/sub ij/ circuit is determined for SPICE model, signal integrity is analyzed when the victim line is, for example, separated from the aggressive one by two and three interconnects.","PeriodicalId":182291,"journal":{"name":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 9th IEEE Workshop on Signal Propagation on Interconnects, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI.2005.1500928","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The purpose of this paper is to explain the way used to determine the electrical frequency dependant equivalent circuit of four coupled interconnects located on the same level. This is done with a full wave finite element method in one way, and the analysis of four symmetrical lines with the telegrapher transmission line equation and coupled mode theory in another way. Once the equivalent R/sub i/, L/sub i/, G/sub i/, Q/sub i/, Z/sub ij/,Y/sub ij/ circuit is determined for SPICE model, signal integrity is analyzed when the victim line is, for example, separated from the aggressive one by two and three interconnects.