On the credibility of load-latency measurement of network-on-chips

Abstract

This paper studies the impact of various simulation and network-on-chip (NoC) setups in common load-latency curves that are used for performance evaluation. The different setups yield very large variation in the observed performance yet they are too often undocumented. Vague definitions make the comparison of NoCs hard or impossible since the large uncertainties hide the actual differences between compared networks. Hence, this paper presents guidelines for performing load-latency measurements for network-on-chips to avoid these pitfalls.