{"title":"nVHDL: A Hardware Design Language for Modeling Discrete and Analog Design and Simulation of Mixed-Signal Electronic Systems (Tutorial Abstract)","authors":"Sumit Ghosh","doi":"10.1109/ISQED.2002.10010","DOIUrl":null,"url":null,"abstract":"The tutorial will focus on the fundamental principles and concepts that underlie every hardware description language invented to-date. It will begin with a quick survey of the classical HDLs for digital systems, discuss Verilog, and then focus heavily on VHDL. HDLs for analog systems such as VHDL-AMS and their basic weaknesses, starting from the fundamental requirements of mixed-signal electronic designs will be examined. Next, the tutorial will concentrate, through meaningful and real-world examples, on how to accurately model hardware so as to get reliable results from HDL simulations. The issues of concurrent simulation of VHDL models on parallel processors and new transport delay semantics that will enable the modeling of PCI and other sophisticated buses based on electromagnetic reflections will be addressed. Finally, in the tutorial, the present problems with VHDL will be examined and current research in “mixed signal” modeling and simulation, that may constitute the basis for a future evolution in HDL technology, namely nVHDL will be reviewed. Time permitting, the tutorial will also explain how to design HDL simulators.","PeriodicalId":302936,"journal":{"name":"IEEE International Symposium on Quality Electronic Design","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.10010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The tutorial will focus on the fundamental principles and concepts that underlie every hardware description language invented to-date. It will begin with a quick survey of the classical HDLs for digital systems, discuss Verilog, and then focus heavily on VHDL. HDLs for analog systems such as VHDL-AMS and their basic weaknesses, starting from the fundamental requirements of mixed-signal electronic designs will be examined. Next, the tutorial will concentrate, through meaningful and real-world examples, on how to accurately model hardware so as to get reliable results from HDL simulations. The issues of concurrent simulation of VHDL models on parallel processors and new transport delay semantics that will enable the modeling of PCI and other sophisticated buses based on electromagnetic reflections will be addressed. Finally, in the tutorial, the present problems with VHDL will be examined and current research in “mixed signal” modeling and simulation, that may constitute the basis for a future evolution in HDL technology, namely nVHDL will be reviewed. Time permitting, the tutorial will also explain how to design HDL simulators.