{"title":"Reliability analysis and thermal resistance degradation of high power chip under harsh environment","authors":"W. Tian, Haoyue Ji","doi":"10.1109/ICEPT.2015.7236781","DOIUrl":null,"url":null,"abstract":"Heat dissipation of high power devices has always aroused great concern both domestic and overseas. But thermal resistance degradation, the key factor of heat dissipation in chip bonding solder layer, is studied by few people. The establishment of high-power device model is based on the physical model. When voids appear in the center/corner of the solder layer, the influence of void rate on solder layer reliability, crack growth rate and thermal degradation are analyzed under harsh condition of -55°C~175°C temperature cycle. The study shows: when voids occur in welding layer, the reliability of welding layer decreases from the normal value 5439Cycles. The welding layer with center void will reduce to 1122Cycles, while the welding layer with corner will reduce to 2221Cycles; the crack growth rate increases with the void rate. The crack growth rate with center voids increases more softly, the maximum can reach 2.385×10-4mm/cycle. The crack growth rate with corner voids increases much more sharply, the maximum can reach 2.739×10-4mm/cycle; thermal degradation of center void and corner void are basically same, but maximum of center void can reach 1.12×10-6K/(W·cycle), while for the corner void, the maximum can reach 4.84×10-7K/(W·cycle).","PeriodicalId":415934,"journal":{"name":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 16th International Conference on Electronic Packaging Technology (ICEPT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEPT.2015.7236781","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Heat dissipation of high power devices has always aroused great concern both domestic and overseas. But thermal resistance degradation, the key factor of heat dissipation in chip bonding solder layer, is studied by few people. The establishment of high-power device model is based on the physical model. When voids appear in the center/corner of the solder layer, the influence of void rate on solder layer reliability, crack growth rate and thermal degradation are analyzed under harsh condition of -55°C~175°C temperature cycle. The study shows: when voids occur in welding layer, the reliability of welding layer decreases from the normal value 5439Cycles. The welding layer with center void will reduce to 1122Cycles, while the welding layer with corner will reduce to 2221Cycles; the crack growth rate increases with the void rate. The crack growth rate with center voids increases more softly, the maximum can reach 2.385×10-4mm/cycle. The crack growth rate with corner voids increases much more sharply, the maximum can reach 2.739×10-4mm/cycle; thermal degradation of center void and corner void are basically same, but maximum of center void can reach 1.12×10-6K/(W·cycle), while for the corner void, the maximum can reach 4.84×10-7K/(W·cycle).