{"title":"A 1.8V 9bit 10MS/s SAR ADC in 0.18µm CMOS for bioimpedance analysis","authors":"Daniele Santana, H. Hernández, W. Noije","doi":"10.1109/LASCAS.2019.8667565","DOIUrl":null,"url":null,"abstract":"In this work a 9-bits low power 10MS/s asynchronous SAR ADC in 180nm CMOS tecnology is presented. The ADC core occupies an active area of 0.124mm2. The ADC main parameters were extracted from post-layout simulations, which resulted in SNR of 55.29dB and ENOB of 8.59 bit at 1.8Vsupply and a sampling frequency of 10MS/s while consuming 0.692mW. The Figure of Merit (FoM) obtained was 145.93 fJ/conversion-step","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2019.8667565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this work a 9-bits low power 10MS/s asynchronous SAR ADC in 180nm CMOS tecnology is presented. The ADC core occupies an active area of 0.124mm2. The ADC main parameters were extracted from post-layout simulations, which resulted in SNR of 55.29dB and ENOB of 8.59 bit at 1.8Vsupply and a sampling frequency of 10MS/s while consuming 0.692mW. The Figure of Merit (FoM) obtained was 145.93 fJ/conversion-step