C. Benbouchama, S. Sakhi, M. Tadjine, A. Bouridane
{"title":"Design o f a n FPGA based neural controller","authors":"C. Benbouchama, S. Sakhi, M. Tadjine, A. Bouridane","doi":"10.1109/HSI.2008.4581492","DOIUrl":null,"url":null,"abstract":"This paper describes an efficient implementation of neural multi-layer networks on FPGA fabric (field programmable gate array). A back-propagation algorithm was used for the training task while implementation and synthesis tools are centred on the ISE 6.3 of Xilinx with the targeted components being Virtex II and Virtex II Pro. A fixed point and a floating point number representation were used for encoding real numbers and for data processing, respectively. The realization of the activation function was carried out according to three methods, for which the results of simulation and synthesis are also presented. The implementation performances were tested using an approximation of some linear and non-linear functions. Of particular importance, an experimental evaluation involving the speed control of a DC motor is given to demonstrate the features of the adopted methodology.","PeriodicalId":139846,"journal":{"name":"2008 Conference on Human System Interactions","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Conference on Human System Interactions","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HSI.2008.4581492","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper describes an efficient implementation of neural multi-layer networks on FPGA fabric (field programmable gate array). A back-propagation algorithm was used for the training task while implementation and synthesis tools are centred on the ISE 6.3 of Xilinx with the targeted components being Virtex II and Virtex II Pro. A fixed point and a floating point number representation were used for encoding real numbers and for data processing, respectively. The realization of the activation function was carried out according to three methods, for which the results of simulation and synthesis are also presented. The implementation performances were tested using an approximation of some linear and non-linear functions. Of particular importance, an experimental evaluation involving the speed control of a DC motor is given to demonstrate the features of the adopted methodology.
本文介绍了一种基于FPGA结构(现场可编程门阵列)的多层神经网络的高效实现方法。训练任务使用了反向传播算法,而实现和合成工具以Xilinx的ISE 6.3为中心,目标组件是Virtex II和Virtex II Pro。一个定点和一个浮点数表示分别用于编码实数和数据处理。根据三种方法实现了激活函数,并给出了仿真和综合结果。使用一些线性和非线性函数的近似来测试实现性能。特别重要的是,一个实验评估涉及直流电机的速度控制给出了证明所采用的方法的特点。