Design of a Syndrome Generator Chip using the Piramid Design System

Abstract

PIRAMID [1] is a design system sub-divided into 3 environments: a Synthesis Environment (SE), a Module Generation Environment (MGE), and a Floorplan Environment (FPE). Starting from a high-level language description of an algorithm, a dedicated signal processor is synthesised (SE). The building blocks of that processor are generated by instantiating a library of parametrised module generators (MGE). The layout of a processor is made by placing and routing the module instances in the floorplanning environment (FPE). PIRAMID is a silicon compiler designed to cover a range of applications for which the input data rate is relatively low in comparison with the system clock rate. Parallellism can be introduced within a processor and on processor level itself. Verification is done by simulation at different levels in the design traject. The syndrome generation algorithm, which is used in Compact Disc error correction algorithms, is an example of a number crunching calculation. It served as a first algorithm to be implemented using the PIRAMID design system.