A BiCMOS 32-bit execution unit for 70 MHz VLSI computer

Shigeya Tanaka, T. Hotta, M. Iwamura, T. Yamauchi, T. Bandoh, A. Hotta, T. Nakano, S. Iwamoto, S. Adachi
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引用次数: 3

Abstract

A BiCMOS 32-bit execution has been developed to attain 70-MHz (typical) speed using 1.0-μm BiCMOS technology. The three important components are: (1) an arithmetic unit, which uses a 0.6-ns 8-bit carry propagation circuit; (2) a 2.5-ns 54-W×32-b four-port register file, which uses a BiCMOS sense circuit and dynamic bus drivers; and (3) a flag generator, which uses a novel all-bit-zero generation algorithm and generates in parallel with the arithmetic computation. A CLSI computer has been implemented with the above components, and 70-MHz register-register operation has been achieved
一种用于70mhz VLSI计算机的BiCMOS 32位执行单元
采用1.0 μm BiCMOS技术,开发了一种32位BiCMOS,可达到70 mhz(典型)速度。三个重要组成部分是:(1)一个算术单元,它使用0.6 ns的8位进位传播电路;(2) 2.5 ns 54-W×32-b四端口寄存器文件,采用BiCMOS感测电路和动态总线驱动;(3)标志发生器,采用新颖的全位零生成算法,与算术计算并行生成。用上述元件实现了一台CLSI计算机,并实现了70 mhz的寄存器-寄存器运算
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