From design-time concurrency to effective implementation parallelism: The multi-clock reactive case

V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. De Simone, L. Besnard, J. Talpin
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引用次数: 16

Abstract

We have defined a full design flow starting from high-level domain specific languages (Simulink, SCADE, AADL, SysML, MARTE, SystemC) and going all the way to the generation of deterministic concurrent (multi-threaded) executable code for (distributed) simulation or implementation. Based on the theory of weakly endochronous systems, our flow allows the automatic detection of potential parallelism in the functional specification, which is then used to allow the generation of concurrent (multi-thread) code for parallel, possibly distributed implementations.
从设计时并发性到有效的实现并行性:多时钟响应性案例
我们已经定义了一个完整的设计流程,从高级领域特定语言(Simulink、SCADE、AADL、SysML、MARTE、SystemC)开始,一直到为(分布式)模拟或实现生成确定性并发(多线程)可执行代码。基于弱内同步系统理论,我们的流程允许在功能规范中自动检测潜在的并行性,然后使用它为并行(可能是分布式实现)生成并发(多线程)代码。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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