Ki-Heung Park, Young Min Kim, H. Kwon, S. Kong, Jong-Ho Lee
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引用次数: 4
Abstract
We have investigated a fully depleted double-gate 1-T DRAM cell device which has SONOS type storage node on control gate for nonvolatile memory function. Due to enlarged hole capacity by the large storage node and source/drain junction depth control in the floating body, we could improving data retention time, I s ,(write"1")/I s ,(write"0") and device scalability. Proposed device could be a very promising candidate for a future high density and high performance IT-DRAM cell.