{"title":"FPGA Implementation of Braun’s Multiplier Using Spartan-3E, Virtex – 4, Virtex-5 and Virtex-6","authors":"R. Anitha, V. Bagyaveereswaran","doi":"10.1007/978-3-642-22543-7_49","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":428598,"journal":{"name":"Programmable Device Circuits and Systems","volume":"64 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Programmable Device Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-3-642-22543-7_49","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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