{"title":"MULTI-modal Imaging of FOREnsic SciEnce Evidence: MULTI-FORESEE Project","authors":"N. Sklavos, S. Francese","doi":"10.1109/DSD51259.2020.00068","DOIUrl":null,"url":null,"abstract":"In Digital Forensics science, face detection and recognition techniques are nowadays tightly connected. Investigators need accurate results delivered quickly for their official reports, in order to solve a case. Hardware implementation of face detection and recognition systems have shown to be very efficient with high recognition rate and short processing time. FPGAs are used for such implementations, because of the parallelism and the speed they can offer. In this work, we present the overview and the objectives of the MULTI-FORESEE COST project in this area. We also present alternative face detection FPGA implementations, and present face recognition techniques, for hardware integration. Finally, we compare these implementations with respect to the FPGA resources which are currently used. Efficient and flexible solutions are proposed in relation to computing power, performance, and allocated resources.","PeriodicalId":128527,"journal":{"name":"2020 23rd Euromicro Conference on Digital System Design (DSD)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 23rd Euromicro Conference on Digital System Design (DSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD51259.2020.00068","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In Digital Forensics science, face detection and recognition techniques are nowadays tightly connected. Investigators need accurate results delivered quickly for their official reports, in order to solve a case. Hardware implementation of face detection and recognition systems have shown to be very efficient with high recognition rate and short processing time. FPGAs are used for such implementations, because of the parallelism and the speed they can offer. In this work, we present the overview and the objectives of the MULTI-FORESEE COST project in this area. We also present alternative face detection FPGA implementations, and present face recognition techniques, for hardware integration. Finally, we compare these implementations with respect to the FPGA resources which are currently used. Efficient and flexible solutions are proposed in relation to computing power, performance, and allocated resources.