Development of a Hardware and Software Complex Based on the Study of the Diagnostic Properties of Methods for Testing Nonvolatile Memory with a Serial Interface

Abstract

This paper investigates the diagnostic abilities of test sequences developed for detecting defects in non-volatile memory with a serial interface. The most common fault models are considered, algorithms for monitoring non-volatile memory are described. A comparative analysis of the complexity of marching tests is carried out and faster control algorithms are proposed. The study was conducted as part of the development of a hardware and software complex for testing non-volatile memory. The article presents the architecture of the complex and describes the schemes for testing static parameters of memory chips.