A Viable NDRO FERRAM Dielectric Structure

D. Lampe, I.W. Dzimianski, D. Adams, H. Buhay, S. Sinharoy, M.H. Francombe
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引用次数: 0

Abstract

Research efforts at Westinghouse over the past three years have demonstrated the use of multi-layered gate dielectric structures in integrated ferroelectric memory field-effect transistors (FEMFETs). Such gate structures include both ferroelectric films and high-quality non-ferroelectric insulating buffer-andcapping layers. These layers, which usually comprise SiO, and Si,N,, perform vital functions by (a) suppressing tunneling/ trapping of charge from the silicon into the ferroelectric film, (b) inhibiting chemical interaction at the interface with the ferroelectric layer, (c) enhancing the breakdown strength and electrical stabilty of the gate structure, and (d) passivating the gate dielectric against subsequent high-temperature processing.
一个可行的NDRO FERRAM介电结构
西屋公司过去三年的研究工作已经证明了多层栅极介电结构在集成铁电存储器场效应晶体管(femfet)中的应用。这种栅极结构包括铁电薄膜和高质量的非铁电绝缘缓冲层和封盖层。这些层通常由SiO, Si,N组成,通过(a)抑制从硅到铁电膜的电荷隧穿/捕获,(b)抑制与铁电层界面的化学相互作用,(c)增强栅极结构的击穿强度和电稳定性,以及(d)钝化栅极电介质以抵抗随后的高温处理,发挥重要作用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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