IC Package with the system board Interconnects - simulation showing PDN noise due to simultaneous switching IOs and its effect on Signal Integrity

Rajesh Badala Jagadeesh, Venkatesh Ramashastry, Bharath Ramprasad, Surya Prakash Rao Bengaluru Srihari, Satvik Bhat, Vignesh Sunku Radhakrishna
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Abstract

The analysis of package design with the PCB interconnects presented here shows the benefit of signal and power integrity co-simulations with power aware approach to mitigate the signal degradation that are caused by non-ideal behavior of the power distribution network and the simultaneous switching I/Os.
带有系统板互连的IC封装-模拟显示了由于同时切换IOs而产生的PDN噪声及其对信号完整性的影响
本文对PCB互连封装设计的分析显示了信号和功率完整性联合仿真与功率感知方法的好处,以减轻由配电网络的非理想行为和同时交换I/ o引起的信号退化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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