Flexible Multi-Precision Accelerator Design for Deep Convolutional Neural Networks Considering Both Data Computation and Communication

Abstract

Due to the quick advance in deep convolutional neural networks (CNN), hardware acceleration of convolution computations for edge devices is crucial for many artificial intelligence applications. This paper presents a CNN accelerator design that supports various CNN filter sizes/strides and different bit precisions. In particular, we analyze the latency of data communication and computation and determine the proper precision that maximizes the utilization efficiency of available hardware resource. The proposed design supports data precision of 8-bit and 16-bit, and weight precision of 2-bit, 4-bit, 8-bit, and 16-bit for popular CNN models. It can effectively increase speed performance of low-precision computation by exploiting the additional parallelism.