Investigation on single pulse avalanche failure of 900V SiC MOSFETs

Na Ren, Hao Hu, Kang L. Wang, Zheng Zuo, Ruigang Li, Kuang Sheng
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引用次数: 12

Abstract

In this work, avalanche ruggedness and failure mechanisms of 900V SiC MOSFETs under single-pulse Unclamped Inductive Switching (UIS) test are investigated and compared with Si counterparts. It was found in this work that, due to the higher resistance to BJT latch-up, only uniform heating related device temperature limit failure exists in SiC MOSFETs. Experimental results also show that, SiC MOSFETs have 9 times higher avalanche energy per area and 50% higher avalanche current than Si MOSFETs in low inductance/short pulse condition. In large inductance/long pulse condition, SiC MOSFETs have shorter avalanche duration, lower avalanche current and only similar avalanche energy per area compared to Si, due to the much smaller (15∗) chip size, thinner active layer thickness and higher power density.
900V SiC mosfet单脉冲雪崩失效研究
本文研究了900V SiC mosfet在单脉冲无箝位电感开关(UIS)测试下的雪崩坚固性和失效机制,并与硅mosfet进行了比较。本研究发现,由于SiC mosfet具有较高的抗BJT锁存能力,因此只存在均匀加热相关的器件限温失效。实验结果表明,在低电感/短脉冲条件下,SiC mosfet的雪崩能量比Si mosfet高9倍,雪崩电流比Si mosfet高50%。在大电感/长脉冲条件下,SiC mosfet的雪崩持续时间较短,雪崩电流较低,每面积的雪崩能量与Si相似,这是由于芯片尺寸更小(15 *),有源层厚度更薄,功率密度更高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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