Na Ren, Hao Hu, Kang L. Wang, Zheng Zuo, Ruigang Li, Kuang Sheng
{"title":"Investigation on single pulse avalanche failure of 900V SiC MOSFETs","authors":"Na Ren, Hao Hu, Kang L. Wang, Zheng Zuo, Ruigang Li, Kuang Sheng","doi":"10.1109/ISPSD.2018.8393695","DOIUrl":null,"url":null,"abstract":"In this work, avalanche ruggedness and failure mechanisms of 900V SiC MOSFETs under single-pulse Unclamped Inductive Switching (UIS) test are investigated and compared with Si counterparts. It was found in this work that, due to the higher resistance to BJT latch-up, only uniform heating related device temperature limit failure exists in SiC MOSFETs. Experimental results also show that, SiC MOSFETs have 9 times higher avalanche energy per area and 50% higher avalanche current than Si MOSFETs in low inductance/short pulse condition. In large inductance/long pulse condition, SiC MOSFETs have shorter avalanche duration, lower avalanche current and only similar avalanche energy per area compared to Si, due to the much smaller (15∗) chip size, thinner active layer thickness and higher power density.","PeriodicalId":166809,"journal":{"name":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2018.8393695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
In this work, avalanche ruggedness and failure mechanisms of 900V SiC MOSFETs under single-pulse Unclamped Inductive Switching (UIS) test are investigated and compared with Si counterparts. It was found in this work that, due to the higher resistance to BJT latch-up, only uniform heating related device temperature limit failure exists in SiC MOSFETs. Experimental results also show that, SiC MOSFETs have 9 times higher avalanche energy per area and 50% higher avalanche current than Si MOSFETs in low inductance/short pulse condition. In large inductance/long pulse condition, SiC MOSFETs have shorter avalanche duration, lower avalanche current and only similar avalanche energy per area compared to Si, due to the much smaller (15∗) chip size, thinner active layer thickness and higher power density.