{"title":"Geometric modelling and display primitives towards specialised hardware","authors":"A. L. Thomas","doi":"10.1145/800059.801161","DOIUrl":null,"url":null,"abstract":"Work over the last ten years developing a simple geometric modelling scheme has led to the design of a high speed display processor capable of generating real time moving displays directly from a three dimensional model. The geometric model consists of a graph-matrix boundary representation linked to a boolean expression volume overlap representation. The architecture of the display processor is particularly suitable for implementation as a pipeline of VLSI components, and current work is exploring this possibility. A divide and conquer, quad tree algorithm applied to the boolean expression model allows the system to make use of scene coherence, and used with the hardware will make it possible to handle scenes of high complexity.","PeriodicalId":381383,"journal":{"name":"Proceedings of the 10th annual conference on Computer graphics and interactive techniques","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1983-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 10th annual conference on Computer graphics and interactive techniques","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/800059.801161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
Work over the last ten years developing a simple geometric modelling scheme has led to the design of a high speed display processor capable of generating real time moving displays directly from a three dimensional model. The geometric model consists of a graph-matrix boundary representation linked to a boolean expression volume overlap representation. The architecture of the display processor is particularly suitable for implementation as a pipeline of VLSI components, and current work is exploring this possibility. A divide and conquer, quad tree algorithm applied to the boolean expression model allows the system to make use of scene coherence, and used with the hardware will make it possible to handle scenes of high complexity.