{"title":"Implementation of novel reflow profile of no-clean fluxes to enhance flux stability and oxide layer removal of the high lead solder bump","authors":"N. Amin, A. Y. Cheah, Lam Zi Yi, Z. Kornain","doi":"10.1109/IEMT.2008.5507833","DOIUrl":null,"url":null,"abstract":"Various reflow profiles have been applied on different no-clean fluxes amount in removing the oxide layer of high lead solder bump. The wafers exposed to open air induce an oxide layer on the high lead solder bump. This oxide layer eventually creates the non wet phenomena in flip chip packaging. An experimental study is carried out by varying different soak time of the reflow profile to optimize the effectiveness of the flux in solving the eutectic and controlled collapse chip connection (C4) high lead bump issue, which indirectly solves the non wet issue. Visual inspection on high lead solder bump under high power microscope is carried out after reflow process. Die pull test is carried out on the solder joint strength analysis to test the solder bump strength. Besides, experiments on substrate cleanliness test, nonwet phenomena and die misalignment are also conducted with useful hints to be implemented.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2008.5507833","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Various reflow profiles have been applied on different no-clean fluxes amount in removing the oxide layer of high lead solder bump. The wafers exposed to open air induce an oxide layer on the high lead solder bump. This oxide layer eventually creates the non wet phenomena in flip chip packaging. An experimental study is carried out by varying different soak time of the reflow profile to optimize the effectiveness of the flux in solving the eutectic and controlled collapse chip connection (C4) high lead bump issue, which indirectly solves the non wet issue. Visual inspection on high lead solder bump under high power microscope is carried out after reflow process. Die pull test is carried out on the solder joint strength analysis to test the solder bump strength. Besides, experiments on substrate cleanliness test, nonwet phenomena and die misalignment are also conducted with useful hints to be implemented.