Thermal management for high performance computing in spaceborne applications

Abstract

Power is a threefold problem for mobile electronic applications-generation, dissipation and junction temperature. Of the three, dissipation is the most limiting for spaceborne applications. Advances in high performance computing and high density packaging exacerbates the power dissipation problem and, hence, the junction temperature problem. In many space applications, particularly on smaller space vehicles, articulated space radiator systems with sealed coolant loops, pumps, etc. are neither practical nor available. Hence, the ultimate limitation is the ability to radiate heat to other sinks-primarily and ultimately to deep space. This paper considers the limitation of deep space as a heat sink for given vehicle parameters such as maximum operating temperatures, available radiating surface area, and emissivity. Different techniques of vehicle cooling are reviewed with a brief discussion of the pros and cons of each technique. Consideration of current and future material availability with better thermal and electrical conductivity is presented. Better thermal conductivity tends to isothermalize the radiating area, thereby increasing radiant heat transfer proportional to the fourth power of the absolute temperature. Increased electrical conductivity reduces power consumption and hence the need for heat dissipation. Such considerations are included in projections of self-dissipation capability per circuit board using advanced composite materials. The direct radiation approach is addressed, including a brief discussion of the conflict between the need for spacing for thermal considerations versus the desire to keep the length of signal paths as short as possible and elimination of the beneficial effects of the spacecraft and chassis shielding. A comparison of power and thermal constraints for a 10 GFLOPS onboard processing system is traded off against current and future material availability, power dissipation, radiation surface area available, and the projected performance density of candidate onboard processing architectures using COTS components.