A 56-Gb/s Transimpedance Amplifier in 0.13-µm SiGe BiCMOS for an Optical Receiver with -18.8-dBm Input Sensitivity

K. Honda, Hiroaki Katsurai, M. Nada, M. Nogawa, H. Nosaka
{"title":"A 56-Gb/s Transimpedance Amplifier in 0.13-µm SiGe BiCMOS for an Optical Receiver with -18.8-dBm Input Sensitivity","authors":"K. Honda, Hiroaki Katsurai, M. Nada, M. Nogawa, H. Nosaka","doi":"10.1109/CSICS.2016.7751018","DOIUrl":null,"url":null,"abstract":"This paper describes a 56-Gb/s transimpedance amplifier with a level-shift circuit and double-feedback-loop (DFB) compensation architecture to achieve high input sensitivity. The level-shift circuit placed between a main transimpedance amplifier and a post amplifier mitigates the trade-off between the bandwidth and noise of the receiver, which reduces the input referred noise by 70%. The DFB compensates for process variation without increasing the noise. The transimpedance amplifier was fabricated in 0.13-um SiGe BiCMOS technology and packaged with an avalanche photodiode. The 3-dB bandwidth of 38.4 GHz and the input referred noise current density of 14.8 pA/rtHz are achieved. These are the best performance among published 50-Gb/s-class transimpedance amplifiers for optical communication.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2016.7751018","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 23

Abstract

This paper describes a 56-Gb/s transimpedance amplifier with a level-shift circuit and double-feedback-loop (DFB) compensation architecture to achieve high input sensitivity. The level-shift circuit placed between a main transimpedance amplifier and a post amplifier mitigates the trade-off between the bandwidth and noise of the receiver, which reduces the input referred noise by 70%. The DFB compensates for process variation without increasing the noise. The transimpedance amplifier was fabricated in 0.13-um SiGe BiCMOS technology and packaged with an avalanche photodiode. The 3-dB bandwidth of 38.4 GHz and the input referred noise current density of 14.8 pA/rtHz are achieved. These are the best performance among published 50-Gb/s-class transimpedance amplifiers for optical communication.
用于-18.8 dbm输入灵敏度光接收机的0.13µm SiGe BiCMOS 56 gb /s跨阻放大器
本文介绍了一种56 gb /s跨阻放大器,该放大器采用电平移位电路和双反馈回路(DFB)补偿结构来实现高输入灵敏度。置于主跨阻放大器和后置放大器之间的电平移位电路减轻了接收器带宽和噪声之间的权衡,从而将输入参考噪声降低了70%。DFB在不增加噪声的情况下补偿了过程变化。该跨阻放大器采用0.13 um SiGe BiCMOS工艺制作,并采用雪崩光电二极管封装。实现了3db带宽为38.4 GHz,输入参考噪声电流密度为14.8 pA/rtHz。这是目前已发布的50 gb /s级光通信跨阻放大器中性能最好的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信