Norio Chujo, K. Sakui, S. Sugatani, H. Ryoson, Tomoji Nakamura, T. Ohba
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引用次数: 0
Abstract
We propose a technology called BBCube 3D for AI and HPC applications, which need high bandwidth and power efficiency. BBCube 3D is constructed by heterogeneous 3D integration in which xPU (CPU, GPU etc.) chiplets and DRAM wafers are stacked using a combination of bumpless Wafer-on-Wafer and Chip-on-Wafer. BBCube 3D has the potential to achieve a bandwidth 30 times higher than DDR5 and four times higher than HBM2E with an bit access energy 1/20th that of DDR5 and 1/5th that of HBM2E.