Leakage power reduction by dual-Vth designs under probabilistic analysis of Vth variation

Michael Liu, Wei-Shen Wang, M. Orshansky
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引用次数: 43

Abstract

Low-power circuits are especially sensitive to the increasing levels of process variability and uncertainty. In this paper we study the problem of leakage power minimization through dual Vth design techniques in the presence of significant Vth variation. For the first time we consider the optimal selection of Vth under a statistical model of threshold variation. Probabilistic analytical models are introduced to account for the impact of Vth uncertainty on leakage power and timing slack. Using this model, we show that the non-probabilistic analysis significantly (by 3/spl times/) underestimates the leakage power. We also show that in the presence of variability the optimal value of the second Vth must be about 30mV higher compared to the variation-free scenario. In addition, this model provides a way to compute the optimal value of the second Vth for a variety of process conditions.
基于Vth变化概率分析的双Vth设计降低泄漏功率
低功耗电路对工艺变异性和不确定性的增加尤其敏感。本文研究了在存在显著v值变化的情况下,通过双v值设计技术实现泄漏功率最小化的问题。本文首次考虑了阈值变化统计模型下Vth的最优选择问题。引入概率分析模型,考虑了Vth不确定性对泄漏功率和定时松弛的影响。使用该模型,我们表明非概率分析显着低估了泄漏功率(3/spl倍/)。我们还表明,在存在可变性的情况下,与无变化的情况相比,第二个Vth的最佳值必须高出约30mV。此外,该模型还提供了一种计算各种工艺条件下第二个Vth的最优值的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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