{"title":"A low power 5Gb/s transimpedance amplifier with dual feedback technique","authors":"I-Hsin Wang, Chung-Shun Liu, Shen-Iuan Liu","doi":"10.1109/APASIC.2004.1349479","DOIUrl":null,"url":null,"abstract":"This paper presents the design and implementation of a 5Gb/s transimpedance amplifier (TIA) with dual shunt-shunt feedback technique to enhance the circuit performance. Measured bandwidth is 4.9GHz and measured transimpedance gain is 60 dB /spl Omega/. The chip consumes only 8mW at 1.8V supply voltage and occupies 650 /spl mu/m /spl times/ 500 /spl mu/m in a 0.18 /spl mu/m CMOS process.","PeriodicalId":375715,"journal":{"name":"Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2004.1349479","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents the design and implementation of a 5Gb/s transimpedance amplifier (TIA) with dual shunt-shunt feedback technique to enhance the circuit performance. Measured bandwidth is 4.9GHz and measured transimpedance gain is 60 dB /spl Omega/. The chip consumes only 8mW at 1.8V supply voltage and occupies 650 /spl mu/m /spl times/ 500 /spl mu/m in a 0.18 /spl mu/m CMOS process.