{"title":"Contact PUF: Highly Stable Physical Unclonable Functions Based on Contact Failure Probability in 180 nm, 130 nm, and 28 nm CMOS Processes","authors":"Duhyun Jeon, Dongmin Lee, Dong Kyue Kim, B. Choi","doi":"10.1109/HOST54066.2022.9839746","DOIUrl":null,"url":null,"abstract":"This study proposes a physical unclonable function (PUF) based on contact failure probability referred to as contact PUF, which has a sufficiently high native stability to achieve mass production without any postprocessing such as error-correction code. The contact is designed to cause stochastic contact failure that is used as the entropy source of the contact PUF. Contact failure can occur in three contact fabrication steps: photolithography, etching, and deposition. We investigated how contact failure occurs in each contact fabrication step in 180 nm, 130 nm, and 28 nm CMOS processes. After the preselection method that discarded unstable bitcells in 180 nm, 130 nm, and 28 nm CMOS processes, no PUF bitcell responses were flipped during 2000 repeated measurements following nine operating conditions, wherein there are three temperatures (−40°C, 25°C, and 125°C) and three supply voltages (nominal, and ±10%). This means that the contact PUFs have bit error rates $< 1.03\\times 10^{-8}, < 2.3\\times 10^{-8}$, and $< 2.3\\times 10^{-7}$ in the cases of the 180 nm, 130 nm, and 28 nm CMOS processes, respectively. The discard ratios of the contact PUFs are $< 1.03\\times 10^{-8}$, 0.0054%, and 0.949% in the respective cases of 180 nm, 130 nm, and 28 nm CMOS processes. The uniqueness of the contact PUFs are respectively equal to 0.4996, 0.49994, and 0.4964 in the 180 nm, 130 nm, and 28 nm CMOS processes.","PeriodicalId":222250,"journal":{"name":"2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOST54066.2022.9839746","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This study proposes a physical unclonable function (PUF) based on contact failure probability referred to as contact PUF, which has a sufficiently high native stability to achieve mass production without any postprocessing such as error-correction code. The contact is designed to cause stochastic contact failure that is used as the entropy source of the contact PUF. Contact failure can occur in three contact fabrication steps: photolithography, etching, and deposition. We investigated how contact failure occurs in each contact fabrication step in 180 nm, 130 nm, and 28 nm CMOS processes. After the preselection method that discarded unstable bitcells in 180 nm, 130 nm, and 28 nm CMOS processes, no PUF bitcell responses were flipped during 2000 repeated measurements following nine operating conditions, wherein there are three temperatures (−40°C, 25°C, and 125°C) and three supply voltages (nominal, and ±10%). This means that the contact PUFs have bit error rates $< 1.03\times 10^{-8}, < 2.3\times 10^{-8}$, and $< 2.3\times 10^{-7}$ in the cases of the 180 nm, 130 nm, and 28 nm CMOS processes, respectively. The discard ratios of the contact PUFs are $< 1.03\times 10^{-8}$, 0.0054%, and 0.949% in the respective cases of 180 nm, 130 nm, and 28 nm CMOS processes. The uniqueness of the contact PUFs are respectively equal to 0.4996, 0.49994, and 0.4964 in the 180 nm, 130 nm, and 28 nm CMOS processes.