On efficient concurrent fault simulation for synchronous sequential circuits

Abstract

The authors report on an efficient fault simulation method for synchronous sequential circuits. The method is based on concurrent fault simulation and has the simplicity of deductive fault simulation. Several new ideas to reduce computation time and memory requirements are proposed. New fault simulators were developed to simulate transition faults as well as stuck-at faults. The experimental results demonstrate that the proposed method is effective for simulating faults in large synchronous sequential circuits in the workstation environment.<>