Multi-Way System Partitioning into a Single Type or Multiple Types of FPGAs

Abstract

This paper considers the problem of partitioning a circuit into a collection of subcircuits, such that each subcircuit is feasible for some device from an FPGA library, and the total cost of devices is minimized. We propose a three-phase heuristic that uses ordering, clustering, and dynamic programming to achieve good solutions. Experimental comparisons are made with the previous methods of [Circuit Partitioning for Huge Logic Emulation Systems][Cost Minimization of Partitions into Multiple Devices].