Exploring the combination of I/sub DDQ/ and i/sub DDt/ testing: energy testing

Abstract

The feasibility of combining I/sub DDQ/ and and i/sub DDt/ testing to detect defective CMOS circuits by measuring the energy consumed by the tested circuit is considered. The energy chronogram of a circuit is used as an energy signature which makes it possible to distinguish between defect-free and defective circuits. Exploratory implementation of the proposed method is presented and experimental results obtained from in-house full custom circuits and commercially available circuits are discussed.