Measuring the thermal diffusivity of CMOS chips

S. M. Kashmiri, K. Makinwa
{"title":"Measuring the thermal diffusivity of CMOS chips","authors":"S. M. Kashmiri, K. Makinwa","doi":"10.1109/ICSENS.2009.5398125","DOIUrl":null,"url":null,"abstract":"This paper describes a new method for determining the effective value of the thermal diffusivity, D<inf>eff</inf>, of a CMOS chip. D<inf>eff</inf> is a parameter that describes the rate at which heat diffuses through a chip, and hence its knowledge is essential for the thermal management of systems on chip and the design of thermal sensors. By embedding an electrothermal filter (ETF) in a frequency-locked-loop (FLL), its phase response, which is determined by its (fixed) geometry and D<inf>eff</inf>, can be measured. D<inf>eff</inf> can then be accurately determined from the measured phase response. For an ETF implemented in a 0.7µm CMOS process, the resulting values of D<inf>eff</inf> were 1.405, 0.755, and 0.495 cm<sup>2</sup>/s at −55, 27, and 125 °C respectively.","PeriodicalId":262591,"journal":{"name":"2009 IEEE Sensors","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Sensors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSENS.2009.5398125","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

This paper describes a new method for determining the effective value of the thermal diffusivity, Deff, of a CMOS chip. Deff is a parameter that describes the rate at which heat diffuses through a chip, and hence its knowledge is essential for the thermal management of systems on chip and the design of thermal sensors. By embedding an electrothermal filter (ETF) in a frequency-locked-loop (FLL), its phase response, which is determined by its (fixed) geometry and Deff, can be measured. Deff can then be accurately determined from the measured phase response. For an ETF implemented in a 0.7µm CMOS process, the resulting values of Deff were 1.405, 0.755, and 0.495 cm2/s at −55, 27, and 125 °C respectively.
测量CMOS芯片的热扩散系数
本文介绍了一种确定CMOS芯片热扩散系数(Deff)有效值的新方法。Deff是描述热量通过芯片扩散速率的参数,因此了解它对于芯片上系统的热管理和热传感器的设计至关重要。通过在锁频环(FLL)中嵌入电热滤波器(ETF),可以测量由其(固定)几何形状和Deff决定的相位响应。然后可以根据测量的相位响应准确地确定Deff。对于采用0.7µm CMOS工艺实现的ETF,在- 55、27和125°C时,Deff的结果值分别为1.405、0.755和0.495 cm2/s。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信