A novel approach to teaching microprocessor design using FPGA and hierarchical structure

Ricardo Paharsingh, J. Skobla
{"title":"A novel approach to teaching microprocessor design using FPGA and hierarchical structure","authors":"Ricardo Paharsingh, J. Skobla","doi":"10.1109/MSE.2009.5270815","DOIUrl":null,"url":null,"abstract":"This paper presents the implementation and delivery of a microprocessor based design laboratory, in an attempt to achieve tighter integration with theory and improve student's performance. The design process follows a hierarchical structure, requiring students to first build basic devices such as logic gates, multiplexers, one-bit memory cells etc. These basic devices are then used to build an ALU, registers, (registers are used to build larger memories), a Data Path and a Control Unit. Students are required to figure out the designs on their own and implement it using VHDL on the XILINX Spartan 3 board. Designs are completed without any high level programming ensuring that students cannot rely on the complier to transform specifications into implementations. Overall we observed better grades and independent student evaluations were higher for this academic year (2008).","PeriodicalId":241566,"journal":{"name":"2009 IEEE International Conference on Microelectronic Systems Education","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Conference on Microelectronic Systems Education","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2009.5270815","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

This paper presents the implementation and delivery of a microprocessor based design laboratory, in an attempt to achieve tighter integration with theory and improve student's performance. The design process follows a hierarchical structure, requiring students to first build basic devices such as logic gates, multiplexers, one-bit memory cells etc. These basic devices are then used to build an ALU, registers, (registers are used to build larger memories), a Data Path and a Control Unit. Students are required to figure out the designs on their own and implement it using VHDL on the XILINX Spartan 3 board. Designs are completed without any high level programming ensuring that students cannot rely on the complier to transform specifications into implementations. Overall we observed better grades and independent student evaluations were higher for this academic year (2008).
基于FPGA和分层结构的微处理器设计教学新方法
本文介绍了一个基于微处理器的设计实验室的实现和交付,试图实现与理论的紧密结合,提高学生的成绩。设计过程遵循分层结构,要求学生首先构建基本器件,如逻辑门,多路复用器,一位存储单元等。这些基本设备然后被用来构建一个ALU、寄存器(寄存器用来构建更大的存储器)、一个数据路径和一个控制单元。要求学生自己找出设计方案,并在XILINX Spartan 3板上使用VHDL实现。设计在没有任何高级编程的情况下完成,确保学生不能依赖编译器将规范转换为实现。总体而言,我们观察到本学年(2008年)的成绩和独立学生评价都有所提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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