Vamshi Veesam, Ramana Thakkallapally, I. Abdel-Motaleb, Zheng Shen
{"title":"3D SiC/Si normally-off MOSFET for high power high speed applications","authors":"Vamshi Veesam, Ramana Thakkallapally, I. Abdel-Motaleb, Zheng Shen","doi":"10.1109/NAECON.2014.7045767","DOIUrl":null,"url":null,"abstract":"An optimized power system requires the integration of more than one technology. In this paper we present a 3D 3C-SiC/Si MOSFET, where high performance power devices can be integrated with low cost Si technology. Using the numerical analysis simulator Silvaco Atlas to simulate the device performance, it was found that these devices can provide double the current while occupying less than 33% of the substrate area of a lateral device with the same gate length and width. The device simulation shows that the breakdown voltage can reach 265V and the drain current can reach 0.5 A/mm at Vg =4 V. The stability of this device with temperature makes it an excellent candidate for high power applications.","PeriodicalId":318539,"journal":{"name":"NAECON 2014 - IEEE National Aerospace and Electronics Conference","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"NAECON 2014 - IEEE National Aerospace and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2014.7045767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An optimized power system requires the integration of more than one technology. In this paper we present a 3D 3C-SiC/Si MOSFET, where high performance power devices can be integrated with low cost Si technology. Using the numerical analysis simulator Silvaco Atlas to simulate the device performance, it was found that these devices can provide double the current while occupying less than 33% of the substrate area of a lateral device with the same gate length and width. The device simulation shows that the breakdown voltage can reach 265V and the drain current can reach 0.5 A/mm at Vg =4 V. The stability of this device with temperature makes it an excellent candidate for high power applications.