Timing optimization with testability considerations

Abstract

Since redundancy is undesirable in high performance circuits, the authors explore timing optimization procedures to determine whether performance optimization may be achieved without introducing redundancy. They demonstrate the conditions under which timing optimization may introduce single stuck-fault redundancies into a given irredundant circuit and illustrate the difficulties in removing or preventing these redundancies. The authors then resolve the question of whether a testability criterion exists that may be retained or easily maintained as invariant during timing resynthesis.<>