{"title":"A novel 2-sided multi-chip-module used to create a 50,000 gate programmable logic device","authors":"R. Terrill","doi":"10.1109/MCMC.1995.512004","DOIUrl":null,"url":null,"abstract":"A 32-layer ceramic multi-chip-module was created to support a 50,000-gate programmable logic device. The high gate-count was achieved by combining four 12,500-gate PLDs and one programmable interconnect on both sides of a 32-layer ceramic substrate. A known-good-die process has been developed for one of the active components by using the module itself as a test bed. In addition, an assembly process has been developed which maximizes rework yield. Made possible with MCM technology, this high-density device is intended for gate array prototyping.","PeriodicalId":223500,"journal":{"name":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCMC.1995.512004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
A 32-layer ceramic multi-chip-module was created to support a 50,000-gate programmable logic device. The high gate-count was achieved by combining four 12,500-gate PLDs and one programmable interconnect on both sides of a 32-layer ceramic substrate. A known-good-die process has been developed for one of the active components by using the module itself as a test bed. In addition, an assembly process has been developed which maximizes rework yield. Made possible with MCM technology, this high-density device is intended for gate array prototyping.